Multicore network security processor

Tuesday, 14 September 2004, 2:35 AM EST

Cavium will sample a line of single-chip, multi-core "network services processors" (NSPs) in Q1, 2005. The Octeon line will have two to 16 MIPS64 cores, and target highly integrated networking devices capable of examining traffic at the application level (OSI Layers 3 to 7) to perform content and security processing.

According to Cavium VP of Marketing Rajiv Khemani, the multicore Octeon line responds to a trend toward integration and convergence in the network device market. "Firewalls, VPNs, IPSec, etc., are converging into a single network appliance. And that appliance is becoming more application-aware. It's making decisions based on applications that are flowing through it, with services such as filtering, load balancing, and QoS (quality of service)."

At Linux Devices.

[ Read more ]




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